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POWER DELIVERY UMC and AP memory collaborate to enable power delivery solutions for AI and HPC systems
United Microelectronics Corporation and AP Memory have announced a technology and manufacturing collaboration to advance power delivery solutions for AI and high-performance computing (HPC) systems. This partnership combines UMC’s deep trench capacitor (DTC) foundry technology and scalable wafer manufacturing with AP Memory’s silicon capacitor designs and system-level integration to address the power efficiency challenges of next-generation data centers.
Rapid scaling of AI workloads is placing unprecedented demands on power delivery within computing systems, driving an architecture shift in data center design from placing power stabilization components on the circuit board to embedding capacitors directly in the interposer or substrate. This innovative approach shortens the power delivery path, improves power integrity, and supports more efficient voltage regulation within advanced packages.
The collaboration reached a significant milestone in the third quarter of 2026, with AP Memory’s S-SiCap Gen2D discrete silicon capacitor designs completing tape-out and initial functional validation. The next step is to proceed to comprehensive system-level performance and reliability testing of capacitors in substrate packages, targeting support for a range of capacitance and operating voltage requirements. UMC and AP Memory are also exploring opportunities to extend the collaboration to other product lines including capacitor-embedded interposers and landside capacitors to address diverse system designs.
GC Hung, Senior Vice President of UMC, said: “The growth of AI and HPC is driving a fundamental shift in power delivery – from board-level towards increasingly vertical power integration on the chip-level. UMC is offering robust power delivery solutions, including our DTC technology, which enables high-density capacitance to be placed closer to the computing die for more stable power delivery. By partnering with AP Memory, we are helping to bring scalable solutions to the market to solve the critical power bottleneck challenges as AI infrastructure continues to evolve.”
Ivan Hong, President of AP Memory, said: “The successful tape-out and initial wafer validation of our customized S-SiCapTM products using DTC technology represents an important milestone in demonstrating the flexibility and manufacturability of AP Memory’s S-SiCap™ design. By working with UMC, we are providing our customers a total solution, from product design to wafer manufacturing.”
UMC’s power delivery solutions roadmap covers both discrete and embedded silicon capacitors that can be applied to different system architectures, and extends to active components such as internal voltage regulators. UMC is also leveraging its advanced packaging capabilities to enable higher-density integration of power components to meet the higher voltage and capacitance requirements of next-generation data centers. In parallel, UMC is further investing in new manufacturing capacity to support both power delivery and heterogeneous integration solutions.
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