ENERGY HARVESTING Step-by-step mathematical dimensioning for energy harvesting power stages

From Diego de Azcuénaga 10 min Reading Time

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This article delivers a step-by-step mathematical framework to size components in ultra-low-power conversion stages, covering specific equations for dynamic impedance matching and quiescent current loss budgeting. This practical approach aims to guarantee system startup and long-term autonomy in battery-free IoT devices.

Practical mathematical methods to size storage, set dynamic impedance targets and budget nanoamp quiescent losses — ensuring reliable startup and sustained operation for energy‑harvesting sensor nodes.(Source: ©  Jai Izzam - stock.adobe.com)
Practical mathematical methods to size storage, set dynamic impedance targets and budget nanoamp quiescent losses — ensuring reliable startup and sustained operation for energy‑harvesting sensor nodes.
(Source: © Jai Izzam - stock.adobe.com)

The proliferation of battery-free industrial IoT nodes and smart edge devices has accelerated the demand for micro-energy harvesting systems. However, bridging the gap between ambient energy sources—such as thermal gradients or indoor light—and a stable regulated voltage rail presents severe power electronics challenges. Transducers often output unpredictable, millivolt-range voltages, meaning that the success of the system relies entirely on a power conversion stage designed with meticulous efficiency and sub-microamp current management.

To overcome these constraints, hardware engineers cannot rely on trial-and-error prototyping; they require a rigorous analytical approach to component dimensioning. This article provides a step-by-step mathematical framework to accurately calculate storage elements, manage discontinuous conduction modes (DCM), and optimize dynamic impedance matching. By implementing these precise power budgeting calculations, designers can drastically minimize quiescent losses, guarantee system start-up under worst-case source conditions, and ensure true long-term autonomy.

Step‑by‑step mathematical framework for sizing ultra‑low‑power conversion stages — equations for dynamic impedance matching, DCM sizing and quiescent‑loss budgeting to ensure cold‑start and long‑term autonomy in battery‑free IoT nodes.(Source:  Diego de Azcuénaga)
Step‑by‑step mathematical framework for sizing ultra‑low‑power conversion stages — equations for dynamic impedance matching, DCM sizing and quiescent‑loss budgeting to ensure cold‑start and long‑term autonomy in battery‑free IoT nodes.
(Source: Diego de Azcuénaga)

Source characterization: Modeling Rs and Voc

To design an efficient power conversion stage, the indispensable first step is the electrical modeling of the energy harvesting transducer. Because ambient energy sources are highly non-linear and critically dependent on environmental conditions, we must characterize their behavior using their Open-Circuit Voltage (Voc) and Internal Source Resistance (Rs). The analytical models for the three most common transducers are detailed below:

1. Thermoelectric Generators (TEG)

A TEG converts a direct temperature gradient into electrical energy via the Seebeck effect. From an electrical standpoint, a TEG behaves linearly and is ideally modeled as a DC voltage source in series with an internal resistance.

  • Open-Circuit Voltage (Voc): It is directly proportional to the temperature differential between the hot (Th) and cold (Tc) plates of the device:
V oc_TEG = αpn N Th - Tc = αTEG ΔT

Where αpn is the Seebeck coefficient of a single thermoelectric couple, N is the number of series-connected couples, and αTEG is the global module coefficient.

  • Internal Resistance (Rs): It depends primarily on the electrical resistivity of the semiconductor materials used (p-type and n-type) and the geometry of the pellets:
R STEG = N ρp Lp Ap + ρn Ln An + Rcontact

Where ⍴ represents resistivity, L is length, A is the cross-sectional area of the pellets, and Rcontact accounts for the metallic interconnect resistance losses.

2. Photovoltaic Transducers (Indoor/Outdoor Solar Cells)

Unlike TEGs, a photovoltaic cell is inherently non-linear and is modeled using the single-diode equivalent circuit.

  • Open-Circuit Voltage (VOC): This occurs when the output current is zero, and it scales logarithmically with light irradiance (Iph):
V OC_PV = n Vt ln Iph I0 + 1

Where n is the diode ideality factor, Vt = kB . T/q is the thermal voltage (≅ 26 mV at 25ºC), Iph is the photo-generated current (proportional to light), and I0 is the diode reverse saturation current.

  • Equivalent Internal Resistance (RS): At the Maximum Power Point (MPP), the dynamic or equivalent internal resistance of the cell can be approximated by evaluating the derivative of the I-V curve:
R S_PV VMPP IMPP 0.8 V OC_PV Iph

For power stage design, RS_PV is not a constant value; it decreases inversely proportional to the ambient light levels.

3. Piezoelectric Transducers (Kinetic/Vibrational Energy)

Piezoelectric elements generate electric charge when subjected to mechanical strain. Since they operate under sinusoidal vibrations, they are modeled in the AC domain as a current source in parallel with an internal capacitance (CP) and a massive parasitic bulk leakage resistance (RP).

  • Open-Circuit Voltage (VOC): Under open-circuit conditions, the generated AC voltage amplitude is directly linked to the mechanical displacement (x) and the piezoelectric properties:
V OC_PIEZO (t) = d31 Y b h CP L x(t)

Where d31 is the piezoelectric strain constant, Y is Young's modulus, and b, h, L are the physical dimensions of the cantilever beam.

  • Internal Source Impedance (ZS): Because the capacitive nature of the material dominates at typical industrial vibration frequencies (10 Hz - 200 Hz), the internal resistance is treated as a frequency-dependent reactance governed by the excitation frequency (⍵):
Z S_PIEZO 1 ω CP RP 1 ω CP

Where Cp is typically in the nanofarad (nF) range, resulting in very high source impedances (kΩ to MΩ), requiring power stages with ultra-high input impedance.

Impedance matching equations and dynamic MPPT

Once the transducers are properly characterized, the primary challenge of the power stage is to extract the maximum available power (Pmax). According to the Maximum Power Transfer Theorem, this condition is met when the input impedance seen by the power stage (Zin) matches the complex conjugate of the source impedance (Zs*). Since these energy harvesting sources operate either in DC or at very low vibration frequencies, this task simplifies to an equivalent resistance matching.

1. The Maximum Power Transfer Criterion (DC)

For resistive sources such as TEGs or linearized photovoltaic systems, the power transferred into the converter's input can be expressed mathematically

Pin = Iin 2 Rin = VOC RS + Rin 2 Rin

To find the optimal operating point, we take the derivative of the input power with respect to the converter's input resistance and set it to zero (dPin/dRin = 0), yielding the fundamental matching condition:

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Rin = RS Pmax = VOC 2 4 RS

2. Resistance Emulation via Switching Converters in DCM

In ultra-low-power harvesters, running continuous microcontroller-driven MPPT routines consumes too much overhead energy. Instead, hardware designers leverage DC-DC converters (typically Boost or Buck-Boost topologies) operating in Discontinuous Conduction Mode (DCM).

In DCM, the average input current of the converter is directly proportional to the input voltage, meaning the switching network inherently behaves as an emulated resistor (Rin_DCM). For a Boost converter, this equivalent input resistance is governed by the following analytical equation:

R in_DCM = 2 L D2 TS

Where L is the power stage inductance, D is the switching duty cycle, and TS is the switching period (1/fsw).

To achieve passive, sensorless MPPT, we equate the emulated resistance to the internal source resistance (Rin_DCM = RS), deriving the explicit design equation for the duty cycle:

D = 2 L RS TS

3. Fractional Open-Circuit Voltage Algorithms (Fractional Voc)

For photovoltaic and thermoelectric transducers, the ratio between the voltage at the maximum power point (VMPP) and the open-circuit voltage (VOC) remains remarkably constant across changing environmental conditions. This allows the use of the Fractional VOC technique, described by the linear equation:

VMPP = k VOC
  • For TEGs: The matching is perfectly symmetrical, making the proportionality factor exactly k = 0.5.
  • For Photovoltaic (PV) Cells: Due to the diode physics, the optimal point shifts slightly higher, typically sitting within the range of k ∈ [0.7, 0.8].

The power stage controller periodically disconnects the transducer for a few milliseconds to sample and store VOC onto a holding capacitor, subsequently regulating the operating input voltage (Vin) to satisfy the equation above using an ultra-low-power analog control loop.

Inductor and capacitor selection in DCM

The physical dimensioning of magnetic and storage elements forms the core hardware of the power stage design. In micro-energy harvesting, these components do not merely define voltage and current ripple; they dictate whether the converter strictly operates in Discontinuous Conduction Mode (DCM), which is vital for maintaining the passive resistor emulation and sensorless MPPT derived in previous sections.

1. Engineering the Inductor (L)

To ensure that the converter operates strictly within the DCM boundaries across all input source conditions, the inductor current must return to zero before the end of the switching period (TS). The critical boundary condition for a Boost converter is governed by the dimensionless conduction parameter (K), which must satisfy the inequality:

K = 2 L R TS < Kcrit = D (1-D) 2

From this boundary constraint, and knowing the design duty cycle (D) and switching frequency (fSW = 1/TS), we calculate the absolute maximum allowable value for the inductor using the following equation:

Lmax = Vin D 1-D 2 TS 2 Iout
  • Critical Parasitic Losses: Meeting the nominal inductance value is not enough. In ultra-low-power systems, the inductor's Direct Current Resistance (DCR) introduces significant Joule conduction losses (Irms2 . DCR) that can quickly destroy system efficiency. Designers must select inductors featuring ultra-low DCR (typically < 500 mΩ) and low-hysteresis magnetic core materials.

2. Dimensioning the Input Capacitor (Cin)

The input capacitor decouples the high-frequency current pulsations caused by the converter's switching network, keeping the transducer's operating voltage ripple close to a stable DC value near the MPP. The calculation of its minimum required capacitance is based on the acceptable peak-to-peak input voltage ripple (ΔVin), usually constrained to 1% or 2% of Vin:

Cin = Iph 1-D TS Δ Vin
  • Leakage Current Criterion: The most critical selection parameter for Cin is its Direct Leakage Current. Standard electrolytic capacitors are strictly prohibited because their micro-ampere leakage currents can easily exceed the total power generated by the ambient transducer. Multi-layer ceramic capacitors (MLCCs) with X7R or X5R dielectrics and insulation resistances higher than 10 GΩ must be utilized.

3. Sizing the Output / Storage Capacitor (Cout)

Since ambient energy harvesting is inherently intermittent, the output capacitor often serves as a short-term energy buffer (either a supercapacitor or a massive MLCC array). Assuming a constant-current discharge stage (Iload) drawn by the load during active application events (e.g., an MCU transmitting RF data packets), the minimum capacitance is calculated based on the burst duration (tburst) and the maximum allowed voltage drop (ΔVout = Vmax - Vmin):

Cout = Iload - Iinavg tburst Δ Vout

To prevent power budget drain during long intervals when the system is in deep sleep, supercapacitors must be specified with minimal Equivalent Series Resistance (ESR) and self-discharge rates well below one micro-ampere.

Efficiency budgeting and loss modeling

The ultimate success in sizing a power conversion stage for energy harvesting is not measured merely by its voltage regulation capability, but by its net energy balance. In systems operating within microwatt (μW) power budgets, the total parasitic loss (Ploss) must be strictly lower than the maximum power extracted from the source (Pin). The analytical breakdown of the switching converter's efficiency budget is governed by the following general equation:

Ploss = Pconduction + Pswitching + Pmagnetic + Pstatic

1. Conduction Losses (P conduction)

Since the converter operates in DCM, the peak inductor current (Ipk) is significantly higher than the average current. Conduction losses across the MOSFET's on-resistance (RDS(on)) and the inductor's direct current resistance (DCR) are computed using the root-mean-square current (Irms):

Pconduction = Irms 2 R DS(on) + DCR Ipk D 3 2 R DS(on) + DCR

2. Switching and Dynamic Losses (P switching + P magnetic)

Every switching cycle drains energy due to the charging and discharging of the MOSFET's parasitic output capacitance (Coss) and the gate charge (Qg). At higher switching frequencies (fsw), these losses dominate the power stage overhead:

Pswitching = 12 Coss Vout 2 fsw + Qg Vgate fsw

Magnetic losses (Pmagnetic) account for the inductor core losses due to hysteresis and eddy currents, which are dependent on the specific core material selection.

3. Static Quiescent Current Losses (P static)

During light-load states or when the system is waiting in standby for the storage buffer to accumulate enough energy, the quiescent current (Iq or house-keeping current) of the control IC becomes the primary efficiency killer:

Pstatic = Vout IQ

To ensure system viability, designers must specify control ICs or design analog control loops with sub-microampere quiescent currents (typically < 500 nA).

Conclusions

Designing power electronics for micro-energy harvesting applications requires abandoning the traditional approximations and empirical rules utilized in conventional higher-power conversion. By implementing the mathematical framework detailed in this article, hardware design engineers can:

  • Guarantee Reliable Cold-Start: Ensuring that the transducer's open-circuit voltage and baseline power output comfortably overcome the critical hardware wake-up thresholds.
  • Maximize Passive Extraction: Exploiting the natural resistive emulation of the DCM switching network to achieve optimal impedance matching without the power overhead of complex digital MPPT loops.
  • Extend System Lifespan: Specifying low-DCR inductors and high-insulation ceramic capacitors eliminates the reliance on chemical batteries entirely, enabling the deployment of truly autonomous, maintenance-free industrial IoT nodes that can operate reliably for decades.

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