PART 5: SEMICONDUCTOR MANUFACTURING Microfabrication testing: Electrical die sorting (EDS)

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Foundries test the reliability of manufactured chips and package them effectively before sending them to the inventories/markets. The fifth article in the semiconductor manufacturing series discusses quality control and electrical die sorting. These are among the final procedures of microfabrication.

Quality Control: Electrical Die Sorting

Post the procedures of doping and metallization, testing is among the last processes of microfabrication. Both testing and packaging are known as back-end semiconductor manufacturing processes. As stated in part 1 of the series, the end goal of fabs is to manufacture highly-reliable, low cost and fully functional semiconducting chips.

Yield, as discussed in part 2, is a metric to understand the number of operational chips produced. Chips, also addressed as dies, must be fully functional. A wafer should provide the same number of operational chips as the total. However, the fabs produce faulty chips in practice.

The wafers are tested in a fully controlled environment free of pollution. These rooms, known as cleanrooms, must comply with ISO standards to meet the criteria for precise quality control. Air, temperature, humidity, and other environmental factors are controlled in these 24-hour operational units.

Wafers are stored in containers and tested with equipment for quality control. The workers allowed to enter cleanrooms must wear uniforms and take precautions as per the standards.

There are numerous processes carried out to test the functionality of the chips produced. The operational chips are forwarded for further packaging. Testing semiconductors during microfabrication involves putting the wafers on the subject of high temperature, electrical, and mechanical stress, and lasers.

One such process to test the functionality of the chips is called electrical die sorting (EDS). Just as the name suggests, electrical die sorting carries out electrical tests to determine the chip’s operating performance. The equipment used in EDS is smart, and automatic, and operates as per the ISO standards.

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1. Electrical tests

The parameters available on an IC datasheet are tested in the wafer probing system to obtain proper values within the specified limit. These parameters include input and output voltages, currents, resistances, capacitances, frequency response, and many more. The values falling within the desirable range directly point out the functionality of the chip.

2. Wafer burn-in Process (WBI)

The WBI is a thermal technique to test the functionality of chips. A wafer with multiple dies is heated at an elevated temperature for a predetermined time. The burn-in process puts wafers on the subject of high temperature and electrical stress. Operational chips withstand the temperature while defective ones are marked.

3. Laser procedures

There are two laser processes: pre-laser and post-laser. The pre-laser processes use electrical signals and are known as hot and cold tests or pre-laser techniques. The thermal test procedures can create irregularities in the wafer surface. The post-laser processes use a beam to fix the issues of the patterned wafer surface.

4. Wafer sawing

Wafer mounting: A protective material, UV tape is attached to a metal ring. The wafer is mounted at the surface of the ring to protect it during the sawing process. The excess tap is removed carefully.

Backgrinding: The wafer is ready to be sliced in the automatic machine. The backside of the wafer is cut through a grinding wheel made up of diamond saw blades. After the thinning procedure, the tape is removed.

5. Die attach

Die attach is the process where the die is “attached” or mounted onto the substrate. The substrate can be a leadframe (made from copper alloy) in matrix form or laminate substrate. The die is attached to the substrate using an adhesive epoxy or soft solder method, depending upon the application.

6. Inking

Inking means marking the defective chips during the test with a “zero” and forbidding them further. The functional chips are tested, and packaged. Fab does not reject faulty chips to increase the yield and cut down on costs. The marked faulty chips are sent to failure analysis laboratories for root cause determination and repair.

After the above six tests of EDS, dies are then cut from the wafer separately for the assembly process.

"Semiconductor Manufacturing" article series

• Part 1: Introduction to semiconductor manufacturing

• Part 2: The Semiconductor “Wafers”

• Part 3: Semiconductor circuit design: key chemical procedures

• Part 4: Doping: The semiconductive character

• Part 5: Microfabrication testing: Electrical die sorting (EDS)

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