POWER GRIDS From the 1 MW rack to the AI factory: rethinking power from grid to GPU

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Artificial intelligence is creating a new generation of data centers. It’s not just about cramming more computing into a rack anymore. It delivers hundreds of kilowatts, and ultimately megawatts to that rack in an efficient, reliable way with a practical physical footprint.

The scale of the transformation is becoming apparent. NVIDIA is creating an 800 VDC power architecture for AI infrastructure that can handle 1 MW racks and above. New projects are being announced at multi-gigawatt scale. OpenAI, for example, has locked in some 8 GW of IT capacity at the PORTS-Pike Technology Campus in Ohio, with the first capacity expected to be brought online later this decade.

These developments signal a paradigm shift in data center power. AC distribution to relatively low-voltage DC rails was done in the traditional way for a very different computing environment. AI is driving that architecture to higher distribution voltages, fewer conversion stages, higher switching frequencies and much higher power density.

The result may be a new power chain: Medium voltage AC → 800 VDC → conversion at the rack level → low voltage processor rails → GPU.

The semiconductor technologies used in that chain will be key.

The megawatt rack changes the equation

For decades, data center power architectures could rely on relatively modest rack power levels and 48 V or similar intermediate distribution schemes. AI accelerators have changed.

NVIDIA's 800 VDC architecture is intended to address precisely this problem. The company says the approach is designed to support 1 MW IT racks and beyond while reducing the limitations associated with conventional low-voltage DC distribution, including copper requirements and conversion losses.

The reason for moving to a higher distribution voltage is straightforward physics. For a given power level, increasing voltage reduces current:

Power = Voltage × Current

At 1 MW, an 800 V bus theoretically carries about 1,250 A. At 54 V, the equivalent current would be more than 18,500 A.

The practical implications go far beyond the number itself. Higher current means larger conductors, greater resistive losses, more demanding interconnects and greater challenges in thermal management. At megawatt scale, these effects become system-level constraints.

800 VDC therefore isn't simply another bus voltage. It is a response to the physical limits of distributing very large amounts of power inside a compact computing infrastructure.

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From the rack back to the grid

The most interesting thing is the move to 800 VDC is beginning to spread outside the rack.

NVIDIA has outlined a phased approach where an 800 VDC power rack can be deployed on top of existing AC infrastructure, allowing data center operators to deploy the new architecture without having to re-architect their entire facility electrical system right away.

In parallel, Siemens and Reinhausen are working on a modular solid-state transformer that can be connected to grid voltages up to 36 kV and provide an 800 VDC output.

This development is significant as it indicates a possible future architecture where the traditional sequence of transformer, AC distribution and multiple downstream conversion stages is greatly simplified.

Instead, power could flow directly from medium-voltage AC to an 800 VDC distribution backbone.

That’s where the notion of an AI factory comes in. The power architecture is no longer built around the single server or rack. We are optimizing it as an integrated system of energy conversion from utility connection to the processor.

Fewer conversion stages, higher-frequency conversion

Once 800 VDC reaches the rack, another problem appears: GPUs and processors do not operate at hundreds of volts.

The final stages of power delivery therefore have to convert a high-voltage DC bus into very low-voltages with extremely high-current rails.

This creates an unusual combination of requirements. The converter must handle high input voltage and substantial power while operating at high frequency and occupying very little space.

One example is an 800 V-to-6 V power-delivery architecture that achieves peak efficiency of up to 97% at full load. The approach eliminates the conventional 48 V intermediate bus, converting directly from 800 V to 6 V.

More broadly, this illustrates a shift toward fewer conversion stages and higher power density. Eliminating an intermediate stage can reduce conversion losses, component count, and physical volume, provided the remaining converter can satisfy the required voltage, current, transient-response, and isolation requirements. [1]

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Where GaN and SiC Fit

This shift opens up opportunities for both wide-bandgap semiconductor technologies but not necessarily in the same places.

SiC is well matched to higher-voltage, high power conversion and is a natural candidate for parts of the upstream power path where voltage ratings, efficiency and ruggedness are a major consideration.

GaN has its own unique advantages. Its fast switching speed and low switching losses can enable operation at much higher frequencies . This is especially useful if you want to reduce the size of magnetics and other passive components .

That becomes more and more important as the power density goes up.

The question therefore is not only whether GaN or SiC will “win” the AI data center. But a more useful question is:

What is the system level benefit of each technology along the grid-to-GPU power path?

As AI data-center racks move toward hundreds of kilowatts and eventually megawatt-class power levels, the roles of gallium nitride (GaN) and silicon carbide (SiC) are becoming increasingly differentiated. Rather than competing across the entire power chain, the two wide-bandgap technologies can address different parts of the emerging 800 VDC architecture.

Silicon carbide and GaN are expected to play different roles in next generation AI server power architectures. At the rack level, incoming 3-phase AC can be converted to an 800 VDC bus in a rack-adjacent power system, or sidecar, before being delivered to the server. SiC is also well suited to the high power conversion stage at power levels that could approach one megawatt per rack because vertical devices can deliver high efficiency at high voltage, along with good thermal performance.

Inside the server the power conversion requirements are different. At the end of the day, you need to convert that 800 VDC bus down to the very low voltages and high currents that AI processors need. 0.6 V GPUs could be supplied with current requirements of tens of thousands of amperes. The limited space available within servers and the fast transient response needed by GPUs also increases the need for high frequency switching, possibly into the multi-megahertz range.

One of the approaches being used for this conversion is the input-series, output-parallel (ISOP) topology. It uses several isolated converters connected in series at their inputs and in parallel at their outputs, allowing processing of an 800 V input by lower-voltage GaN devices in separate converter stages. For example, eight 100 V-to-12 V converters can handle an 800 V input in sum, while still providing a 12 V output.

Advances in supporting components such as isolated gate drivers and auxiliary isolated power supplies have also helped the practical implementation of ISOP. This topology can be extended to higher voltages by adding stages in series, so that the same basic approach can be used at 1200 V, 1500 V or higher input levels.

This leads to a division of functions between the two semiconductor technologies. SiC can be used for the high power conversion between the AC supply and the 800 VDC rack bus. GaN can handle the high frequency conversion in the server. Thus the choice is governed by the electrical and thermal needs of each stage, rather than by a direct comparison between the two technologies. Silicon-based power devices are also approaching practical limits in some of these applications, particularly as switching frequency, current density, and power-conversion efficiency requirements increase.

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The efficiency problem becomes a thermal problem

At megawatt scale, even a small percentage of conversion loss translates into a significant amount of heat.

For a 1 MW rack, a conversion stage operating at 98% efficiency would dissipate about 20 kW, while at 99% efficiency the loss would be reduced to about 10 kW. Although the difference is only one percentage point, it represents a substantial change in the thermal load of a densely packed system.

This makes the electrical and thermal architectures increasingly interdependent. Liquid cooling can remove heat from processors and power electronics more effectively than air cooling, but it also requires additional energy, space, and infrastructure.

As a result, overall data-center efficiency depends not only on the efficiency of individual power-conversion components, but on how effectively the entire energy and cooling path is designed and integrated.

The AI factory is the next level of power engineering

The scale of current infrastructure projects demonstrates why this matters.

OpenAI's planned Ohio campus is expected to reach approximately 8 GW of IT capacity, with hundreds of megawatts planned initially. NVIDIA's involvement illustrates how closely compute availability is becoming tied to the availability of land, electricity and data-center infrastructure.

At this scale, the traditional distinction between the data center and the power system begins to disappear.

The data center effectively becomes an energy-conversion system where the power output is the ultimate limitation on computation performance.

The critical engineering questions become:

• How efficiently can electricity be converted from medium-voltage AC to an 800 VDC backbone?

• How much copper can be eliminated by increasing distribution voltage?

• How many conversion stages can be removed?

• How much higher can switching frequency go?

• Where should SiC and GaN be deployed?

• How can power electronics and liquid cooling be designed together?

• How can the architecture scale from hundreds of kilowatts to multiple megawatts per rack?

These questions will increasingly determine the performance and economics of AI infrastructure.

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From compute scaling to power scaling

In the past decade, the semiconductor industry has optimized AI computing with more powerful processors and accelerators. The next phase may be as much about the infrastructure around those processors as the processors themselves.

The switch to 800 VDC is a major milestone, as it addresses one of the basic constraints of high-power computing: how to efficiently transfer electricity through a system that is simultaneously becoming more powerful and more condensed.

But 800 VDC should not be seen as the destination. It is better understood as part of a larger grid-to-GPU power architecture that could include anything from medium-voltage solid-state transformers to high-frequency GaN-based converters right next to the processor.

Power electronics will play an increasingly important role in computing architecture as rack power approaches 1 MW and AI campuses move to multi-gigawatt scale. The future AI factory won’t be just about how many GPUs it’s got. And it will also be a function of how well it can turn power into computation.

Reference

[1] Maurizio Di Paolo Emilio, “EPC’s GaN Roadmap Comes Into Focus Ahead of PCIM Asia: Gen 8 and Trinity Point to the Next Power-Density Leap,” EPC GaN Talk Blog, Aug. 19, 2026.

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