SEMICONDUCTOR TECHNOLOGY Empower launches high-density silicon capacitors for AI processors

From Empower Semiconductor 1 min Reading Time

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Empower Semiconductor announced the launch of three new embedded silicon capacitors (ECAPs), designed to meet the power integrity demands of next-generation AI and high-performance computing (HPC) processors.

Empower Semiconductor introduces embedded silicon capacitors designed to improve power delivery and stability in AI and high-performance computing processors. (symbolic image)(Source: ©  IF.arc - stock.adobe.com)
Empower Semiconductor introduces embedded silicon capacitors designed to improve power delivery and stability in AI and high-performance computing processors. (symbolic image)
(Source: © IF.arc - stock.adobe.com)

The new ECAP portfolio includes the EC2005P, with 9.34μF capacitance in a 2mm x 2mm package; the EC2025P, offering 18.68μF capacitance in a 4mm x 2mm package; and the EC2006P, providing 36.8μF capacitance in a 4mm x 4mm form factor.

As AI processors push the limits of performance, power delivery has emerged as a critical constraint. Achieving the required power integrity for extreme current densities and ultrafast transient response is no longer realistic with board-level mounted components; embedding capacitors into the processor substrate is now essential. Empower Semiconductor’s ECAP portfolio is leading the industry initiatives to embed high-density silicon capacitors, unlocking the power integrity required to scale next-generation processor performance.

“Our customers are under intense pressure to deliver greater performance with tighter power margins,” said Steve Hertog, Senior Vice President Worldwide Sales, Empower Semiconductor. “These new ECAPs are a proven and practical way to deploy higher capacitance density into a smaller footprint right at the package level of the AI processor.”

Empower’s new ECAP solutions feature ultralow equivalent series inductance (ESL) and equivalent series resistance (ESR). The wide bandwidth ultralow impedance delivers optimal power delivery network (PDN) performance and significantly improves overall power integrity. Each device has been engineered from a packaging perspective to meet the strict dimensional and tolerance requirements necessary for embedded deployment within AI and HPC processors.

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