GATE DRIVER Automotive gate driver enabling scalable, high-performance EV powertrains

From STMicroelectronics 2 min Reading Time

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STMicroelectronics’ STGAP4S galvanically isolated automotive gate driver for SiC MOSFETs and IGBTs gives flexibility to control inverters of different power ratings featuring programmable protections and rich diagnostics that allow ISO 26262 ASIL D qualification. With analog-digital converter and flyback controller integrated, the STGAP4S provides a highly featured and functional-safety qualified driver for scalable EV-powertrain designs.

The STGAP4S gate driver ensures robust EV-powertrain control with integrated diagnostics and flexible inverter management across various power levels. Learn more about this here.(Source: ©  Tahsin - stock.adobe.com)
The STGAP4S gate driver ensures robust EV-powertrain control with integrated diagnostics and flexible inverter management across various power levels. Learn more about this here.
(Source: © Tahsin - stock.adobe.com)

The STGAP4S owes its flexibility to the output circuit that allows connecting the high-voltage power stage to an external MOSFET’s push-pull buffer to scale the gate-current capability. This architecture lets engineers leverage the STGAP4S and its wide features to control inverters with different power ratings, up to high-power designs with multiple power switches in parallel. The driver can generate up to tens of amperes of gate-drive current with very small MOSFETs and handles a maximum operating voltage of 1200V.

Among the driver’s key features, its advanced diagnostics facilitate system-safety integrity up to ISO 26262 level D (ASIL-D) for safety-critical applications. The diagnostics include self-checks to verify the integrity of connections, the gate-drive voltages, and correct operation of internal circuitry such as the desaturation and over-current detection. The host system can read the diagnostic-status register through the IC’s SPI port. In addition, two diagnostic pins provide hardware-detectable indications of fault status.

With protections including active Miller clamping, under-voltage and over-voltage lockout (UVLO, OVLO), as well as desaturation, overcurrent, and over-temperature detection, the STGAP4S enables robust and rugged designs that meet stringent reliability demands. The device has configurable parameters, including protection thresholds, deadtime, deglitch filtering, programmed through the SPI, giving extensive design flexibility.

The STAGP4S also integrates a fully protected flyback controller. This can be optionally used to generate the supplies of the high-voltage section for the positive and negative gate-driving signals for fast, efficient switching of SiC MOSFETs. The galvanic barrier provides 6.4kV of isolation between the low-side circuitry and the high-side sections.

The EVALSTGAP4S evaluation board, now available, includes two STGAP4S drivers to help complete evaluation of their features in a half-bridge application. The design lets users easily connect more boards together to evaluate more complex topologies such as a three-phase inverter.

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